1. Field of the Invention
The present invention is directed to power modules and, more particularly, to an arrangement of the terminals of a power module which reduces the inductance and capacitance of the module.
2. Related Art
In known power modules, the inductance is proportional to the length of the conductor. Further, mounting the power module on a heatsink (normally connected to Earth) creates a capacitance between the power devices and Earth. This capacitance is proportional to the area of the conductor, and is proportional to the conductor length for the same width.
Typically, in a three-phase inverter layout in a power module, the critical inductance is in the leads connecting from the positive bus through the devices of the individual arms of the inverter and is in the leads connecting the devices back to the negative bus. The presence of a high stray inductance increases the switching stress on the semiconductor.
Furthermore, when IGBTs are included in the inverter circuit, high frequency switching currents are induced by the turn-on and turn-off of the IGBT as well as during the antiparallel diode recovery time. The leads that carry these high frequency currents thus act as an antenna and produce electromagnetic emissions. When the conductors are sufficiently long, the electromagnetic emissions will reach an unacceptable level.
FIG. 1 shows a known arrangement for a three-phase inverter circuit. Here, a first arm of the inverter includes series-connected MOS-gated devices Q1 and Q2 with their respective anti-parallel connected diodes D1 and D2 as well as an output terminal U connected to the node between the two MOS-gated devices. A second arm similarly includes series-connected devices Q3 and Q4 with their respective anti-parallel connected diodes D3 and D4 with output terminal V arranged between the two devices. Further, a third arm includes devices Q5 and Q6 with their respective anti-parallel connected diodes D5 and D6 with output terminal W connected to the node situated between the two devices. Each arm is supplied by a positive terminal P and returns to a negative terminal N.
The inductance of the third arm, for example, is proportional to the length of the current path that extends from positive terminal P to node A, node B, devices Q5 and Q6 with diodes D5 and D6, node C, node D and finally negative terminal N. Additionally, body diodes D5 and D6 recover through the same path that forms the inductance so that the recovery current for the diodes is supplied through an external capacitor which is connected across terminals P and N. Capacitive coupling between conductors experiencing high dv/dt to Earth causes undesirable ground leakage current, deteriorating EMI performance.
It is therefore desirable to reduce the inductance and capacitance of the module for better electromagnetic interference (EMI) performance and for reduced voltage overshoot.